Japanese Patent Application Laid-Open No. 2013-145851 (Patent Document 1) describes a semiconductor device in which a cathode region of a diode and a collector region of an IGBT are formed in an area exposed to one surface of a semiconductor substrate, in which a first conductor layer contacting the cathode region and a second conductor layer contacting the collector region are formed on the front surface, and in which a work function of the second conductor layer is larger than a work function of the first conductor layer.